Contractual Defect Density Guarantee Structures across Secondary Foundry Wafer Supply Agreements
Effective defect guarantee structures map precise inspection recipes and mathematical yield models directly to gross-to-net credit adjustment formulas.
Defect Density Guarantees
Meaning
Contractual quality commitments in semiconductor supply agreements specify the maximum number of allowable surface and bulk anomalies per unit area. Silicon providers provide defect density guarantees to shield integrated circuit manufacturers from low-yield runs caused by faulty substrate materials. These clauses define the pass or fail criteria for entire wafer shipments and establish the compensation models for out-of-specification batches.
Without these commitments, buyers would bear the entire financial risk of materials-related yield dropouts.
Risk Allocation
Commercial agreements divide the liability of processing defects between the raw material vendor and the wafer foundry. When wafer lots violate the defect density guarantees, the foundry recovers the costs of the processed material and the wasted chemical additives. This protection is negotiated in the master supply contract to avoid lengthy litigations over ruined production runs.
Pricing Mechanism
Wafer pricing is structured on a sliding scale that matches the guaranteed defect limits of each wafer grade. Lower defect tolerances command a higher unit price, which compensates the wafer manufacturer for their own yield losses.
Material Verification
Incoming quality control departments use advanced scanning systems to verify the wafer batch against the agreed limits. If a batch fails to meet the criteria, the buyer rejects the lot immediately at the supplier’s expense.