Contractual Defect Density Guarantee Structures across Secondary Foundry Wafer Supply Agreements
Effective defect guarantee structures map precise inspection recipes and mathematical yield models directly to gross-to-net credit adjustment formulas.
Stacking Faults
Meaning
Crystallographic defects describe the localized disruptions in the regular layer-by-layer sequence of atoms within a crystal lattice. These structural anomalies, known as stacking faults, occur during epitaxial growth or high-temperature processing of semiconductor materials like silicon or silicon carbide. They are limited to the specific planes of the crystal structure and do not extend into macroscopic fractures unless subjected to extreme mechanical stress.
Their presence is monitored to ensure the structural integrity of wafer substrates.
Growth Condition
Thermal variations and surface contamination during the deposition process represent the primary causes of these lattice errors. When a wafer undergoes chemical vapor deposition, the presence of stacking faults can be minimized by maintaining a clean environment and a precise temperature profile. This control prevents the propagation of lattice mismatch throughout the growing layer.
It reduces the density of defects in the final wafer.
Electrical Influence
Device performance suffers when these crystal disruptions create localized energy states that trap charge carriers. This trapping increases leakage currents and reduces the efficiency of the power devices.
Warranty Exposure
Long-term reliability is threatened when these defects grow under the influence of operating currents. This growth can cause premature device failure, leading to expensive warranty claims for the module manufacturer.